# KAIST low‑temperature ALD technique enables crystal‑aligned tellurium

**Published:** 2026-08-02T07:11:51.086Z  
**Topic:** Layer 2 Scaling  
**Sentiment:** neutral  
**Publisher:** TrendWatcher — https://www.trendwatcher.in/article/139dc83b-fa63-438d-af7c-e1488f9b584d

New 150 °C atomic layer deposition method grows epitaxial tellurium on van der Waals substrates, opening a path for AI chips and ultra‑low‑power devices.

A new atomic layer deposition (ALD) process developed by KAIST researchers can grow crystal‑aligned tellurium (Te) films at just 150 °C, preserving delicate van der Waals interfaces while delivering high‑quality semiconductor layers—an advance that could accelerate next‑generation AI and optoelectronic hardware [1].

| At a glance | |
|---|---|
| Temperature | 150 °C |
| Materials | Tellurium on WSe₂, MoS₂, ReSe₂, mica |
| Technique | Diffusion‑steered epitaxial ALD |
| Catalyst | Low‑temperature growth without interface damage |

## How the process works  
The team replaced random nucleation with a diffusion‑steered approach: Te‑containing precursor molecules migrate across the substrate until they reach energetically favorable sites, then lock into place, producing a uniformly aligned crystal lattice that mirrors the underlying 2‑D material [1]. Electron microscopy confirmed consistent orientation and minimal interfacial distortion, a stark contrast to conventional epitaxy that typically requires much higher temperatures and can damage temperature‑sensitive stacks [2].

## Early device results  
Using the aligned Te films, the researchers fabricated functional transistors and optoelectronic components, demonstrating that the method is not limited to material synthesis but extends to practical device manufacturing [1]. The versatility was shown across multiple van der Waals substrates, indicating a scalable route for heterogeneous integration of diverse semiconductors on a single chip [2].

## Implications for future hardware  
Tellurium’s anisotropic conductivity and favorable optical properties make it attractive for photodetectors, LEDs, and ultra‑low‑power electronics [1]. By enabling epitaxial growth at 150 °C, the technique supports the stacking of temperature‑sensitive layers—crucial for complex AI processors that rely on clean, atomically precise interfaces. The authors suggest the method could become a core manufacturing platform for heterogeneous semiconductor integration, potentially lowering power consumption and boosting performance in next‑generation chips [1][2].

## What to watch  
- Follow upcoming publications from the KAIST team for scalability data and yield metrics.  
- Monitor adoption by semiconductor manufacturers targeting AI and low‑power markets.  
- Watch for patents or licensing agreements that could signal commercial rollout.

The breakthrough shows that precise crystal alignment need not come at the cost of high‑temperature processing, opening a practical path for integrating a wide range of next‑generation semiconductor materials while preserving their intrinsic properties.

## Sources
1. Electronics For You — [Low-Temperature ALD Aligns Semiconductor Crystals](https://www.electronicsforu.com/news/low-temperature-ald-aligns-semiconductor-crystals)
2. Techxplore — [Low-temperature technique grows crystal-aligned semiconductor films](https://techxplore.com/news/2026-07-temperature-technique-crystal-aligned-semiconductor.html)
3. AlphaGalileo — [KAIST Develops Low-Temperature Technique for Growing Crystal-Aligned Semiconductor Films](https://www.alphagalileo.org/en-gb/Item-Display/ItemId/275958)

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Cite as: TrendWatcher, "KAIST low‑temperature ALD technique enables crystal‑aligned tellurium", https://www.trendwatcher.in/article/139dc83b-fa63-438d-af7c-e1488f9b584d